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Comment on Intel CPU Temperature Monitoring Driver For Linux Now Unmaintained After Layoffs

There is ARM also found on apple,raspberry pi,Orange Pi but those are SBCS they can always be turned into ARM.
The only problem with ARM its a closed ISA like X64.
And note that the raspberry pi and orange pi is a SBC. The only Problem with both ARM AND RISC-V They are RISC not CISC like x64 so better power consumption with lower clock speeds.

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Mihies@programming.dev ⁨1⁩ ⁨day⁩ ago
RISC is perfectly good for desktops as demonstrated by Apple. Microcontroller chips are suitable for light desktop tasks, they are nowhere near modern x64 CPUs. For now.

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- Eknz@lemmy.eknz.org ⁨1⁩ ⁨day⁩ ago
  It doesn’t really make much of a difference on modern CPUs as instructions are broken down into RISC-like operands even on CISC CPUs before being processed to make pipelining more effective.
  
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  - Kazumara@discuss.tchncs.de ⁨12⁩ ⁨hours⁩ ago
    Yeah if you build a RISC processor directly you can just save the area needed for instruction decode.
    
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  - LH0ezVT@sh.itjust.works ⁨1⁩ ⁨day⁩ ago
    This is the correct answer. Modern x86 (x64) is a RISC CPU with a decoder that can decode a cisc isa.
    
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  - Mihies@programming.dev ⁨1⁩ ⁨day⁩ ago
    From what I remember one of problems with CISC is that it has variable length instructions and these are harder to predict since you have to analyze all instructions up to the current one wheres for RISC you exactly know where is each instruction in memory/cache.
    
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    The_Decryptor@aussie.zone ⁨20⁩ ⁨hours⁩ ago
    
    one of problems with CISC is that it has variable length instructions
    
    RISC systems also have variable length instructions, they’re just a bit stricter with the implementation that alleviates a lot of the issues (ARM instructions are always either 16-bits or 32-bits, while RISC-V is always a multiple of 16-bits and self-describing, similar to UTF-8)
    
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    Eknz@lemmy.eknz.org ⁨1⁩ ⁨day⁩ ago
    This isn’t completely true. Even a basic instruction like ADD has multiple versions once decoded depending on the memory used. For example, if the memory being operated on is in RAM, then the ADD needs to be decoded to include a fetch operand before it can be used.
    
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- Mwa@thelemmy.club ⁨1⁩ ⁨day⁩ ago
  alr thanks for the info
  
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