I think they mean RISC-V, not RISC in general.
Other than battery optimizations pretty much all of the issues don’t exist on something like a Raspberry Pi which is RISC architecture (Broadcom chips). Sounds like Qualcomm just doesn’t have their shit together.
kkj@lemmy.dbzer0.com 4 months ago
trolololol@lemmy.world 4 months ago
Maybe that’s what they though but it’s not what they said.
jodanlime@midwest.social 4 months ago
ARM = Acorn Risc Machine