Didn’t intently this with 3D cross point or something like that? Then it failed and was repurposed to optane, which also flopped?
brucethemoose@lemmy.world 2 weeks ago
Yeah, it’s a solution in search of a problem.
Is it cheaper than DRAM? Great! But until then, even if it’s lower power due to not needing the refresh, flash is just so cheap that it can be scaled up much better.
And I dunno what they mean by AI workloads. How would non volatility help at all, unless it’s starting to approach SRAM performance.
muusemuuse@lemm.ee 2 weeks ago
brucethemoose@lemmy.world 2 weeks ago
Yes because ultimately, it just wasn’t good enough.
That’s what I was trying to argue below. Unified memory is great if it’s dense and fast enough, but that’s a massive if.
just_another_person@lemmy.world 2 weeks ago
This type of memory creates a new kind of state capability for HPC computing and huge core-scaled workloads, so maybe that’s why you’re confused.
HP basically created the physical use-case awhile back with something called The Machine. They got up to the point of having all the hardware pieces functional and even built a Linux-ish OS, but then needed customers before getting to tackling the memory portion. Hence, why this type of memory tech exists.
We’re in a bit of weird time right now with computing in general where we’re sort of straddling the line between continuing projects with traditional computing and computers, or spending the time and effort to attempt to adapt certain projects to quantum computing. This memory is just one hardware path forward for traditional computing to keep scaling outward.
Where it makes the most sense: huge HPC clusters. Where it doesn’t: everywhere else.
I assume the author mentions “AI” because you could load an entire data set into this type of memory and have workers and have many NPU cores or clusters working off of the same address space without it being changed. Way faster than disk and it eliminates the context switching problem if you’re sure it’s state stays static.
brucethemoose@lemmy.world 2 weeks ago
How is that any better than DRAM though? It would have to be much cheaper/GB, yet reasonably faster than the top-end SLC/MLC flash Samsung sells.
Another thing I don’t get… in all the training runs I see, dataset bandwidth needs are pretty small. Like, streaming images (much less like 128K tokens of text) is a minuscule drop in the bucket compared to how long a step takes, especially with hardware decoders for decompression.
Weights are an entirely different duck, and stud like Cerebras clusters do stream them, but they need the speed of DRAM.
just_another_person@lemmy.world 2 weeks ago
I think you’re stuck in the traditional viewpoint of a computer being CPU+Mem+Storage. That’s fine for a single machine that a regular user would have.
This type of memory could essentially wipe out the need for traditional deployments in datacenters by having memory banks of this stuff operating with many CPUs as a client on a bus with no local storage needed, so just CPU+Mem and everything loaded into a known state via network storage that won’t go away if something loses power or crashes. It would definitely make the current idiotic use of GPUs more cost-effective and less wasteful.
If you try and take that down to a regular user needing a use-case, it’s really only going to matter for developers building things for such a system because it’s such a new idea having stateful memory. You may just be thinking about it like a single user, which is not what it would be used for at all (at first).
To your other question about the actual speed: current memory speeds only need to be that fast because of the storage involved and shuttling data across a bus between the three parts. Getting this new type of stateful memory to higher speeds than a current storage device would already show a performance benefit because you’re removing one step in the total transfer path between all three points and just having the two. So really a speed of something higher than SSD but slower than current DDR speeds should still see a benefit in theory.
Overall, this has been a path for things for quite awhile, and they’ve obviously got to get some sheets out to explain the performance and efficiency benefits still, and it will require a complete rework of how current CPUs and bridge controllers work…it’s quite a ways off from being an everyday product.
brucethemoose@lemmy.world 2 weeks ago
You are talking theoretical.
A big reason that supercomputers moved to a network of “commodity” hardware architecture is that its cost effective.
How would one build a giant unified pool of this memory? CXL, but how does it look physically? Maybe you get a lot of bandwidth in parallel, but how would it be even close to the latency of “local” DRAM busses on each node? Is that setup truly more power efficient than banks of DRAM backed by infrequently touched flash? If your particular workload needs fast random access to memory, even at scale the only advantage seems to be some fault tolerance at a huge speed cost, and if you just need bulk high latency bandwidth, flash has got you covered for cheaper.
…I really like the idea of non volatile unified memory, but ultimately architectural decisions come down to economics.
pelya@lemmy.world 2 weeks ago
But it’s very convenient! When you have a BSOD, you don’t need your core dumped, you simply unplug your DRAM+ and send it to Microsoft using paper mail.