…and there you go:
ccs25files.zoolab.org/main/…/3719027.3765061.pdf
Literally published less than a day ago:
ExfilState: Automated Discovery of Timer-Free Cache Side Channels on ARM CPUs
Comment on Hackers can steal 2FA codes and private messages from Android phones
ChaosMonkey@lemmy.dbzer0.com 2 days agoThat wouldn’t be too bad. There could be a new permission for precise time.
ABasilPlant@lemmy.world 2 days ago
ABasilPlant@lemmy.world 2 days ago
You can implement a counting-thread that’s even more precise than the CPU’s timer (TSC on x86) platforms. This was shown in attacks on Intel SGX, where the rdtsc instruction to access the time-stamped counter is unavailable.
link.springer.com/chapter/…/978-3-319-60876-1_1
arxiv.org/pdf/1702.08719