It was you who was talking about “bus paths” and “traversing CPU>RAM>SSD”. There’s neither buses connected up to any of those things nor does the data ever flow like that, it always flows via the CPU.
It was you who was talking about “bus paths” and “traversing CPU>RAM>SSD”. There’s neither buses connected up to any of those things nor does the data ever flow like that, it always flows via the CPU.
just_another_person@lemmy.world 1 week ago
🤣 That isn’t a relational diagram. Simply pointing out the three bus paths.
barsoap@lemm.ee 1 week ago
That’s three devices. There’s two connections between them, and they go “RAM<->CPU<->SSD”. The first <-> is the DRAM Phy, the second <-> is 1-4 PCIe lanes. Neither of them are a bus. There is no third connection.