Comment on New 'DRAM+' memory designed to provide DRAM performance with SSD-like storage capabilities, uses FeRAM tech

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just_another_person@lemmy.world ⁨2⁩ ⁨weeks⁩ ago

No, you misunderstood. A current standard computer bus path is guaranteed to have at least 3 bus paths: CPU, RAM, Storage.

The amount of energy required to communicate between all three parts varies, but you can be guaranteed that removing just one PLUS removing the capacitor requirement for the memory will reduce power consumption by 1/3 of whatever that total bus power consumption is. This is ignoring any other additional buses and doing the bare minimum math.

The speed of this memory would matter less if you’re also reducing the static storage requirement. The speed at which it can communicate with the CPU only is what would matter, so if you’re not traversing CPU>RAM>SSD and only doing CPU>DRAM+, it’s going to be more efficient.

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